I am Raj, a computer engineering student with an interest in systems programming.

leetcode

codeforces

github

Raj Vishwakarma  • Peerlist

I developed the Lumen Inference Engine, a high-performance, low-latency C++ runtime built from scratch to minimize software synchronization overhead in high-frequency AI workloads. Operating on an 8-core CPU architecture, the engine achieves a peak throughput of 295.48 requests per second and an elite optimal tail latency (P99) of 21.28 ms for SqueezeNet models. To completely bypass the traditional kernel-level thread parking and context-switching penalties found in standard mutex-based systems, I implemented a lock-free, bounded Multi-Producer Multi-Consumer (MPMC) queue based on Dmitry Vyukov's algorithm alongside a thread-per-core isolated execution layout. To eliminate global heap contention and memory fragmentation under heavy concurrency saturation, the engine integrates a custom region-based allocator called Lumen Arena. This memory layer facilitates deterministic, thread-local allocation operations using O(1) pointer bumps. Using native Linux kernel performance monitoring units (perf stat), I verified the engine's micro-architectural boundary conditions, demonstrating an optimization jump to 1.265 Instructions Per Cycle (IPC) and a significant reduction in Last-Level Cache (L3) miss rates. This project highlights my core focus on systems programming, atomic data structures, and low-level performance engineering to push hardware capabilities to their absolute physical limits.

Lumen

I engineered Metalyzer from scratch, a dependency-free, high-performance C++17 compiler frontend and lexical analyzer generator that translates regular expression specifications into highly optimized, standalone C++ tokenization code. Built completely without relying on standard regex libraries, the suite implements foundational automata theory—including Thompson's Construction, Subset Construction for Power-Set DFAs, and Equivalence-Class Partitioning for state minimization—to resolve lexical conflicts at compile time and guarantee O(1) state transitions during execution. To optimize the hot-path execution driver, the engine serializes the minimized state machine into dense, cache-friendly 2D transition matrices, completely eliminating pointer-chasing and dynamic allocation overhead while implementing a greedy Maximal Munch stream rollback algorithm for deterministic error isolation. The defining architectural milestone of this project was the progression from an initial character-by-character stream abstraction to a custom 16KB Sliding Chunk Buffer. This high-speed memory-mapped middle ground handles low-frequency, unformatted block transfers, pushing heavy standard library streaming overhead entirely outside the main state transition loops. By processing the active cache window exclusively via bare-metal pointer tracking, the engine maintains live, line-by-line interactive streaming capabilities for console inputs while matching industry-standard Flex performance. In automated laboratory stress tests over large, dense syntax payloads under explicit core isolation and hardware cache flushing, the architecture achieved a blistering processing throughput of up to 284 MB/s, validating Metalyzer as a production-grade frontend solution optimized for modern CPU instruction pipelines.

Metalyzer

I engineered Sequitur, a high-frequency trading matching engine written in C++20 and integrated with a concurrent Go network gateway via a 6.29MB bidirectional POSIX shared memory ring buffer. The architecture isolates a pure Price-Time Priority limit order book inside a dedicated, single-threaded execution core pinned to physical silicon via taskset and SCHED_FIFO, completely removing operating system synchronization, context switches, and atomic serialization stalls from the trading hot path. To achieve a peak throughput of 63.9 million operations per second, a mean latency of 15.7 nanoseconds, and a strict P99 tail latency bound of 18.2 nanoseconds, the system utilizes a zero-allocation contiguous object pool that maintains cache locality, alongside a lock-free SPSC egress pipeline that buffers outbound execution reports out-of-band to prevent Head-of-Line blocking. To eliminate the multi-threaded cache-line bouncing trap caused by false sharing, the core trading loop tracks real-time performance indicators using thread-local registers, macro-batching metric updates to an asynchronous logging worker only once every 1,024 orders. This decoupled telemetry engine outputs zero-allocation JSON logs to a memory-resident RAM disk, where a Vector data agent leverages inotify watches to stream data into Grafana Loki and Grafana for real-time, sub-microsecond percentile plotting.